notes For RGPV Bhopal CBCS CBGS Students

  • Computer Architecture (IT-4005)

    Computer Architecture (IT-4005) RGPV notes CBGS Bachelor of engineering

    Course Objectives:

    The objective of course is to understand the basic structure and operation of computer system. Students will be able to know the operation of the arithmetic unit including the algorithms & implementation of fixed-point and floating-point addition, subtraction, multiplication & division. To study the different ways of communicating with I/O devices and standard I/O interfaces, hierarchical memory system including cache memories and virtual memory, concept of pipeline.


    Syllabus

    UNIT 1:
    Computer architecture and organization, computer generations, von Neumann model, CPU organization, CPU organization, Register organization, Various CPU register, Register Transfer, Bus and Memory Transfers, Arithmetic, Logic and Shift micro-operations, Arithmetic logic shift unit.

    UNIT 2:
    The arithmetic and logic unit, Fixed-Point representation: integer representation, sign-magnitude, 1’s and 2’s complement and range, Integer arithmetic: negation, addition and subtraction, multiplication, division, Floating-Point representation, Floating-Point arithmetic, Hardwired micro-programmed control unit, Control memory, Micro-program sequence.

    UNIT 3:
    Central Progressing Unit (CPU), Stack Organization, Memory Stack, Reverse Polish Notation. Instruction Formats, Zero, One, Two, Three- Address Instructions, RISC Instructions and CISC Characteristics, Addressing Modes, Modes of Transfer, Priority Interrupt, Daisy Chaining, DMA, Input-Output Processor (IOP).

    UNIT 4:
    Computer memory system, Memory hierarchy, main memory: RAM, ROM chip, auxiliary and associative memory, Cache memory: associative mapping, direct mapping, set-associative mapping, write policy, cache performance, Virtual memory: address space, memory space, address mapping, paging and segmentation, TLB, page fault, effective access time, replacement algorithm.

    UNIT 5:
    Parallel Processing, Pipelining General Consideration, Arithmetic Pipeline, and Instruction Pipeline, Vector Operations, Matrix Multiplication, and Memory Interleaving, Multiprocessors, Characteristics of Multiprocessors.


    NOTES


    Course Outcomes

    On the completion of this course students will be able to understand:
    1. Basic structure of computer system, arithmetic operations,
    2. The organization of the Control unit, Memory unit, I/O unit.
    3. The concept of memory management, interleaving and mapping.
    4. The concept of DMA and pipeline.


    Books Recommended

    1. M. Morris Mano, “Computer System Architecture”, Pearson.
    2. Dr. M. Usha, T.S. Srikanth, “Computer System Architecture and Organization”, Willey India.
    3. William Stallings, ”Computer Organization and Architecture”, Pearson.
    4. V. Rajaraman, T. Radhakrishnan, “Computer Organization and Architecture”, PHI.


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