VLSI Design (EC-8001) - B.E RGPV CBCS & CBGS Scheme Notes
VLSI Design (EC-8001)
VLSI Design (EC-8001) RGPV notes CBGS Bachelor of engineering

Syllabus

UNIT 1:
Introduction, Size and complexity of Integrated Circuits, The Microelectronics Field, IC Production Process, Processing Steps, Packaging and Testing, MOS Processes, NMOS Process, CMOS Process, Bipolar Technology, Hybrid Technology, Design Rules and Process Parameters.

UNIT 2:
Dc Models, Small Signal Models, MOS Models, MOSFET Models in High Frequency and small signal, Short channel devices, Sub threshold Operations, Modeling Noise Sources in MOSFET’s, Diode Models, Bipolar Models, Passive component Models.

UNIT 3:
Introduction, Circuit Simulation Using Spice, MOSFET Model, Level 1 Large signal model, Level 2 Large Signal Model, High Frequency Model, Noise Model of MOSFET, Large signal Diode Current, High Frequency BJT Model, BJT Noise Model, Temperature Dependence of BJT.

UNIT 4:
Random Logic and Structured Logic Forms, Register Storage Circuits, Quasi Static Register Cells, A Static Register Cell, Micro coded Controllers, Microprocessor Design, Systolic Arrays, Bit-Serial Processing Elements, Algotronix.

UNIT 5:
Basic CMOS Technology, A Basic n-well CMOS Process, Twin Tub Processes, CMOS Process Enhancement, Interconnects and Circuit Elements, Layout Design Rules, Latch up, Physical Origin, Latch up Triggering, Latch up Prevention, Internal Latch up Prevention Techniques.


NOTES


List of Practicals:

1. Introduction to Simulation tools ie Microwind/Synopsis/Tanner Tool etc.
2. Simulation and analysis of basic logic and circuits.
3. Familiarization with MOS model parameters in PSPICE software.
4. Simulation of MOS Inverter with different loads using PSPICE software.
5. Simulation of CMOS Inverter for different parameters Kn, Kp as a design variable in PSPICE software.
6. Study of the switching characteristics of CMOS Inverter and find out noise margins.
7. Simulate CMOS amplifier using PSPICE software.
8. Layout design of a CMOS Inverter using any layout design tool. Layout design of a 2-input CMOS NAND/NOR gate using any layout design tool.
9. Simulate 1-bit full adder following behavioral and structural modeling using VHDL\Verilog.


Books Recommended

1. Geiger, Allen and Strader: VLSI Design Techniques for Analog and Digital Circuits, TMH.
2. Sorab Gandhi: VLSI Fabrication Principles, Wiley India.
3. Weste and Eshraghian: Principles of CMOS VLSI design, Addison-Wesley
4. Weste, Harris and Banerjee: CMOS VLSI Design, Pearson-Education.
5. Pucknell and Eshraghian: Basic VLSI Design, PHI Learning.
6. Botkar: Integrated Circuits, Khanna Publishers.
7. Sze: VLSI Technology, TMH.


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